Optical image receiving device having wide dynamic range

ABSTRACT

Provided is an optical image receiving device having a high and rapid sensitivity and a wide dynamic range manufacture in a CMOS process. The image receiving device includes a capacitor transistor for a special purpose in addition to a general structure of three transistors and a light receiving portion. The capacitor transistor has first and second source/drain ports connected to the capacitance node and the floating diffusion node, respectively, and is gated in response to activation of a predetermined capacitor control signal. In the CMOS optical image receiving device, the floating diffusion node is pumped over an external power voltage. Thus, the electronic potential of the floating diffusion node in the initialization state is much higher than the maximum voltage of the light receiving portion. Thus, the CMOS active pixel has a very high sensitivity in a region where the intensity of light is weak. Furthermore, since the sensitivity decreases in a region where the intensity of light is strong, the dynamic range thereof can be increased very large.

TECHNICAL FIELD

The present invention relates to an image sensor, and more particularly,to the structure of a pixel of a CMOS (complementary metal oxidesemiconductor) image sensor

BACKGROUND ART

An image sensor captures an image by using a semiconductor device'sfeature of reacting to external energy, for example, photons. Lightgenerated from an object existing in nature has an intrinsic energyvalue in a wavelength thereof. A pixel of the image sensor detects thelight generated from the object and converts the detected light to anelectric value.

A photodiode included in the pixel of the image sensor typically has aP-I-N (P-type semiconductor-intrinsic semiconductor-N-typesemiconductor) structure to maximize a quantum efficiency. The advantageof the P-I-N structure lies in that a wide depletion region can beformed by injecting impurity having a concentration lower than otherN-type region. A strong electric field can be generated in the depletionregion. Thus, the pairs of electrons and holes generated by photonsincident on the depletion region are not recombined but separated fromone another. That is, since the electrons enter in the photodiode whilethe holes are exhausted out of the photodiode, the electrons arecompletely captured. However, a weak electric field is generated in abalance region, other than the depletion region. Thus, since theelectron and hole pairs generated by the photons incident on the balanceregion are highly likely to recombine, a possibility of capturing theelectrons, that is, the quantum efficiency, is remarkably lowered. As aresult, to improve the quantum efficiency, it is advantageous toincrease the size of the depletion region as well as the size of thephotodiode.

FIG. 1 shows a conventional 3-transistor CMOS active pixel, in which thesection of a photodiode is shown with electronic signs of otherelements. In the conventional 3-transistor CMOS active pixel, an N⁻ typeimpurity layer 11 constituting one side conjunction of the photodiodecontacts an N type floating diffusive layer 13. That is, since thefloating diffusive layer 13 functions as a capacitor of the photodiode,an actual capacitance component of the photodiode is a sun of capacitorcomponents generated by the N^(?) type impurity layer 11 and the N typefloating diffusive layer 13. Thus, the sensitivity of the image sensoremploying the conventional 3-transistor CMOS active pixel isdeteriorated.

Also, as the N type impurity of the floating diffusive layer 13 entersthe N^(?) type impurity layer 11, the size of the depletion regiondecreases. Thus, even if an externally input voltage is increased, acritical voltage, that is, a pining voltage VPIN, at which the depletionregion is not formed any more, can be lower than an external powervoltage VDD. In this case, however, the operating range of the CMOSactive pixel decreases.

DISCLOSURE OF INVENTION Technical Problem

To solve the above and/or other problems, the present invention providesa CMOS active pixel that enables the operation of an image sensor evenin a low voltage range and improves the sensitivity thereof.

Technical Solution

According to an aspect of the present invention, a CMOS active pixelcomprises a photodiode which generates signal charges according toreceived photons, a capacitance node which receives the signal chargesgenerated from the photodiode, a reset transistor which resets thecapacitance node in response to activation of a predetermined resetcontrol signal, a floating diffusion node which gates a predeterminedriving transistor, the driving transistor which is controlled by avoltage level of the floating diffusion node, a select transistor whichtransmits a voltage transmitted by the driving transistor to acorresponding data line in response to a predetermined row selectionsignal, and a capacitor transistor which has first and secondsource/drain ports connected to the capacitance node and the floatingdiffusion node, respectively, and is gated in response to activation ofa predetermined capacitor control signal.

The capacitor control signal is inactivated before the reset controlsignal is inactivated and activated after the inactivation of the resetcontrol signal.

According to another aspect of the present invention, a CMOS activepixel is provided. The structure of the CMOS active pixel issubstantially the same as that of the above preferred embodiment.However, a capacitor is provided instead of the capacitor transistor andhas one port commonly connected to the capacitance node and the floatingdiffusion node and the other port electrically connected to apredetermined capacitor control signal.

ADVANTAGEOUS EFFECTS

As described above, in the CMOS active pixel according to the presentinvention, the floating diffusion node driving the driving transistor ispumped over the external power voltage. Thus, the electronic potentialof the floating diffusion node in the initialization state is quitegreater than the pinning voltage of the photodiode. Thus, the CMOSactive pixel according to the present invention has a very highsensitivity in a region where the intensity of light is weak.Furthermore, since the sensitivity decreases in a region where theintensity of light is strong, the dynamic range thereof can be increasedvery large.

DESCRIPTION OF DRAWINGS

The above and other features and advantages of the present inventionwill become more apparent by describing in detail preferred embodimentsthereof with reference to the attached drawings in which:

FIG. 1 is a view illustrating a conventional 3-transistor CMOS activepixel, in which the section of a photodiode is shown with electronicsigns of other elements;

FIG. 2 is a circuit diagram showing an image sensor using a CMOS activepixel according to a preferred embodiment of the present invention;

FIG. 3 is a timing diagram of signals related to the preferredembodiment of FIG. 2;

FIG. 4 is a view illustrating the section of the CMOS active pixel shownin FIG. 2, in which the section of a photodiode and electronicpotentials with respect to the respective regions are shown withelectronic signs of other elements;

FIG. 5 is a plot showing the effect of the CMOS active pixel accordingto a preferred embodiment of the present invention in comparison withthe conventional CMOS active pixel;

FIG. 6 is a circuit diagram of a modification of the CMOS active pixelof FIG. 2;

FIG. 7 is a circuit diagram of a 4-transistor CMOS active pixelaccording to another preferred embodiment of the present invention;

FIG. 8 is a timing diagram of signals related to the CMOS active pixelof FIG. 7; and

FIG. 9 is a view illustrating the section of the CMOS active pixel shownin FIG. 7, in which the section of a photodiode and electronicpotentials with respect to the respective regions are shown withelectronic signs of other elements.

MODE FOR INVENTION

Referring to FIG. 2, a CMOS active pixel 20 according to a preferredembodiment of the present invention includes a photodiode PH, acapacitance node MC, a reset transistor 27, a floating diffusion nodeFD, a driving transistor 28, a select transistor 29, and a capacitortransistor TCAP.

The photodiode PH generates signal charges according to receivedphotons. Preferably, the photodiode PH has a P-I-N structure, that is,an intrinsic semiconductor layer is formed at a boundary of a PNjunction by forming an impurity layer by injecting N-type impurityformed in a P-well or P-type substrate. Since the photodiode PH having aP-I-N structure forms a PN junction at both lower and upper boundarysurfaces of the N-type impurity layer, a quantum efficiency is improved.

The capacitance node MC receives the signal charges generated by thephotodiode PH. The reset transistor 27 is gated by a predetermined resetcontrol signal GRX. When the reset control signal GRX is ‘high’ so as tobe activated, charges remaining at the capacitance node MC are output toan external power voltage VDD. Thus, when the reset control signal GRXis activated, potential energy in the photodiode PH region becomes aground state and initialized.

The driving transistor 28 is gated by the floating diffusion node FD.That is, the driving transistor 28 is controlled by a voltage level ofthe floating diffusion node FD. At last, a voltage level transmitted toa data line DL is determined.

The select transistor 29 transmits a voltage transmitted by the drivingtransistor 28 to the data line DL corresponding to a column of the CMOSactive pixel 20 in response to a predetermined row selection signal GSX.The row selection signal GSX is a signal to select a row including theCMOS active pixel 20. When the row selection signal GSX is activated,data of all CMOS active pixels in the same row are transmitted to thedata line DL.

A reset voltage and a data voltage are sampled from the voltage of thedata line DL in response to a reset sampling signal RSH and a datasampling signal DSH and stored in a first capacitor C1 and a secondcapacitor C2, respectively. The stored reset voltage and data voltageare compared to a comparator 40 and a first output signal VOUT1 and asecond output signal VOUT2 are generated.

The CMOS active pixel 20 according to a preferred embodiment of thepresent invention further includes the capacitor transistor TCAP.Preferably, the capacitor transistor TCAP has first and secondsource/drain ports connected to the capacitance node MC and the floatingdiffusion node FD, respectively, and is an NMOS transistor that is gatedby a predetermined capacitor control signal GCX. Thus, when thecapacitor control signal GCX is ‘high’ so as to be activated, thecapacitor transistor TCAP is turned on so as to form a capacitor.

FIG. 3 is a timing diagram of signals related to the preferredembodiment of FIG. 2. As shown in FIG. 3, the capacitor control signalGCX is inactivated around inactivation points t1 and t1 ? of the resetcontrol signal GRX. That is, the capacitor control signal GCX isinactivated to ‘low’ at points t2 and t2 ? before the inactivation ofthe reset control signal GRX and activated to ‘high’ at points t3 and t3? after the inactivation of the reset control signal GRX. According tothe timing of the capacitor control signal GCX, a capacitor componentformed by the capacitor transistor TCAP can increase a voltage of thefloating diffusion node FD over the external power voltage VDD. As aresult, as shown in FIG. 4, the electronic potential of the floatingdiffusion node FD is higher by h1 than that of a region where theexternal power voltage VDD is applied, which appears in the drawing tobe lower because the electronic potential has a unit of −eV.

As shown in FIG. 4, the electronic potentials of a capacitor transistorregion B and a floating diffusion node region C in an initializationstate are higher than that of a photodiode region A. Accordingly, signalcharges generated from the photodiode region A are moved to both regionsB and C. Thus, even when electrons are captured in the photodiode regionA, the electronic potential of the photodiode region A is not lowered.That is, a depletion region in the photodiode region A does notincrease. Thus, the sensitivity of a CMOS active pixel is very high at alow voltage. Such a phenomenon continues until the electronic potentialsof the capacitor transistor region B and the floating diffusion noderegion C are the same as that of the photodiode region A.

After the electronic potentials of the capacitor transistor region B andthe floating diffusion node region C are the same as that of thephotodiode region A, since not only the capacitor transistor region Band the floating diffusion node region C but also the photodiode regionA substantially functions as a capacitor, the sensitivity decreases andthe dynamic range increases.

FIG. 5 is a plot showing the effect of the CMOS active pixel accordingto a preferred embodiment of the present invention in comparison withthe conventional CMOS active pixel. In FIG. 5, the horizontal axissignifies light incident on the photodiode PH, that is, the amount ofphotons, while the vertical axis signifies the electronic potential ofthe floating diffusion node region B of FIG. 4. Also, a solid linesignifies the electronic potential of the present invention while adotted line signifies the electronic potential of the conventiontechnology. Referring to FIG. 5, the inclination of the electronicpotential in the present invention with respect to light energy untilthe electronic potential of the floating diffusion node region B becomesa pinning voltage VPIN is steeper than that of the conventionaltechnology. However, the inclination of the electronic potential in thepresent invention with respect to light energy after the electronicpotential of the floating diffusion node region B becomes the pinningvoltage VPIN is gentler than that of the conventional technology.

Thus, the CMOS active pixel according to the present invention reactswith a very high sensitivity in a region where the intensity of light isweak and has a very wide dynamic range since the sensitivity decreasesin a region where the intensity of light is strong.

FIG. 6 shows a modified example of the CMOS active pixel of FIG. 2. Thestructure of the modified example of FIG. 6 is substantially the same asthat of the preferred embodiment shown in FIG. 2. However, a capacitorCAP is provided instead of the capacitor transistor TCAP of FIG. 2. Oneport of the capacitor CAP is commonly connected to the capacitance nodeMC and the floating diffusion node FD. The other port of the capacitorCAP is connected to the capacitor control signal GCX.

The timing diagram of the modified example of FIG. 6 is the same as thatof FIG. 3. The effect of the modified example of FIG. 6 is almost thesame as that of the preferred embodiment of FIG. 2. Thus, detaileddescriptions on the timing and effect of the relevant signals of FIG. 6are omitted herein.

The characteristic feature of the CMOS active pixel of the presentinvention can be applied to a 4-transistor CMOS active pixel. FIG. 7 isa circuit diagram of a 4-transistor CMOS active pixel according toanother preferred embodiment of the present invention. The structure ofthe 4-transistor CMOS active pixel of FIG. 7 is almost the same as thatof the conventional 4-transistor CMOS active pixel.

For the convenience of explanation, only the different structuralfeatures between the present preferred embodiment of FIG. 7 and thepreferred embodiment of FIG. 3 are described. In the present preferredembodiment of FIG. 7, the floating diffusion node FD is electricallyconnected to the capacitance node MC. Accordingly, the floatingdiffusion node FD and the capacitance node MC are the same node. Apredetermined transmission transistor T11 is provided between thephotodiode PH and the capacitance node MC. This is a characteristicfeature of the 4-transistor CMOS active pixel which prevents contactbetween the photodiode PH and the floating diffusion node FD.

The transmission transistor T11 is gated by a predetermined transmissioncontrol signal GTX. Thus, when the transmission control signal GTX isactivated to ‘high’, the photodiode PH is connected to the capacitancenode MC.

The timing diagram of the relevant signals in the preferred embodimentof FIG. 7 is different from that of the relevant signals of theconventional 4-transistor CMOS active pixel.

FIG. 8 is a timing diagram of signals related to the CMOS active pixelof FIG. 7. As shown in FIG. 8, the transmission control signal GTX isaround points t4 and t4 ? where the reset control signal GRX isinactivated. That is, the transmission control signal GTX is inactivatedat points t5 and t5 ? before the reset control signal GRX is inactivatedand activated at points t6 and t6 ? after the inactivation of the resetcontrol signal GRX. According to the operation timing of thetransmission control signal GTX, a charge pumping phenomenon occurs inthe floating diffusion mode FD by a capacitor formed by the transmissiontransistor T11. As a result, as shown in FIG. 9, the electronicpotential of the floating diffusion node FD may have a higher potentialby h2 than the conventional technology.

Since the effect in accordance with the increase in the electronicpotential of the floating diffusion node FD is almost the same as thatdescribed with reference to FIG. 5, a description thereof is omittedherein.

While this invention has been particularly shown and described withreference to preferred embodiments thereof, it will be understood bythose skilled in the art that various changes in form and details may bemade therein without departing from the spirit and scope of theinvention as defined by the appended claims.

1. A CMOS active pixel comprising: a photodiode which generates signalcharges according to received photons; a capacitance node which receivesthe signal charges generated from the photodiode; a reset transistorwhich resets the capacitance node in response to a reset control signal,wherein the reset control signal is continuously activated for a firstpredetermined time period during which the reset transistor is activatedto form an initialization state on which electronic potential energy inarea of the photodiode becomes a ground state; a floating diffusion nodewhich gates a driving transistor, the driving transistor beingcontrolled by a voltage level of the floating diffusion node; a selecttransistor which transmits a voltage transmitted by the drivingtransistor to a corresponding data line in response to a row selectionsignal; and a capacitor transistor which has first and secondsource/drain ports connected to the capacitance node and the floatingdiffusion node, respectively, and is gated in response to a capacitorcontrol signal, the capacitor transistor being activated in response tothe capacitor control signal to form a capacitance; wherein thecapacitor control signal becomes in an inactivation state during thefirst predetermined time period so that the capacitor transistor isactivated to form the capacitance during a second predetermined timeperiod between a start time of the first predetermined time period and astart time of the inactivation state of the capacitor control signal;and wherein electronic potentials in regions of the capacitor transistorand the floating diffusion node are higher than electronic potential inregion of the photodiode in the initialization state, and a depletionregion in the region of the photodiode does not increase.
 2. The CMOSactive pixel of claim 1, wherein the photodiode has a P-I-N (P-typesemiconductor-intrinsic semiconductor-N-type semiconductor) structure.3. A CMOS active pixel comprising: a photodiode which generates signalcharges according to received photons; a capacitance node which receivesthe signal charges generated from the photodiode; a reset transistorwhich resets the capacitance node in response to a reset control signal,wherein the reset control signal is continuously activated for a firstpredetermined time period during which the reset transistor is activatedto form an initialization state in which electronic potential energy inarea of the photodiode becomes a ground state; a floating diffusion nodewhich gates a driving transistor, the driving transistor beingcontrolled by a voltage level of the floating diffusion node; a selecttransistor which transmits a voltage transmitted by the drivingtransistor to a corresponding data line in response to a row selectionsignal; and a capacitor which has one port commonly connected to thecapacitance node and the floating diffusion node and the other portelectrically connected to a capacitor control signal, the capacitorbeing activated in response to the capacitor control signal to form acapacitance; wherein the capacitor control signal becomes in aninactivation state during the first predetermined time period so thatthe capacitor is activated to form the capacitance during a secondpredetermined time period between a start time of the firstpredetermined time period and a start time of the inactivation state ofthe capacitor control signal; and wherein electronic potentials inregions of the capacitor and the floating diffusion node are higher thanelectronic potential in region of the photodiode in the initializationstate, and a depletion region in the region of the photodiode does notincrease.
 4. A CMOS active pixel comprising: a photodiode whichgenerates signal charges according to received photons; a transmissiontransistor which is connected between the photodiode and a capacitancenode to provide the signal charges to the capacitance node in responseto activation of a transmission control signal; the capacitance nodewhich receives the signal charges transmitted by the transmissiontransistor; a reset transistor which resets the capacitance node inresponse to a reset control signal, wherein the reset control signal iscontinuously activated for a first predetermined time period duringwhich the reset transistor is activated to form an initialization statein which electronic potential energy in area of the photodiode becomes aground state; a floating diffusion node which gates a driving transistorand electrically connected to the capacitance node; the drivingtransistor which is controlled by a voltage level of the floatingdiffusion node; and a select transistor which transmits a voltagetransmitted by the driving transistor to a corresponding data line inresponse to a row selection signal, wherein the transmission controlsignal becomes in an inactivation state during the first predeterminedtime period so that the transmission transistor is activated to providethe signal charges during a second predetermined time period between astart time of the first predetermined time period and a start time ofthe inactivation state of the transmission control signal; and whereinelectronic potentials in regions of the transmission transistor and thefloating diffusion node are higher than electronic potential in regionof the photodiode in the initialization state, and a depletion region inthe region of the photodiode does not increase.